ISA-24-IO

                       

Connection
  • 8bit ISA bus XT-card

 
  • Configurable IO address range through jumpers.
  • The Output connection can be interfaced via a normal floppy drive ribbon cable.

 

 

Features
  • Easy programming using 8255 PPI.
  • Configurable 3 ports configurable Input or Output.

 

 

Schematic

 

 

 

Note

  • The ISA bus port tags show the ISA pin name and the ISA pin number.
  • A0 to A31 are the pin found on the component side of the card.
  • B0 to B31 are the ISA connections found on the non-component side of the ISA card.
  • SA19 to SA0 is the ISA 20bit address bus.
  • D7 to D0 is the ISA 8bit data bus.
  • Put a capacitor (0.1uF) next to the 8255 Vcc pin and ground, to short spikes which may disrupt proper functioning. (though I never placed one and the card always worked fine).

    •  

     

    Function

    The card is very simple. The 8255 does most of the job interfacing data and control lines from the ISA, in fact they are connected directly. The three 8bit IO ports are controlled via the 8255 through the ISA connection. The rest is the address decoding part. The only address pins used are SA0 to SA10. A1 and A0 are used directly for 8255 internal addressing. The address range usable by the card uses is 0x300-0x33f and 0x340-0x37f, since this range is free for expansion and does not conflict with other normal PC resources.

    Not used

    3

    3

    0

    SA19-SA12

    SA11-SA8

    SA7-SA4

    SA3-SA0

     

    0000 

    0110

    0110

    0000

    SA19-SA12

    SA11-SA8

    SA7-SA4

    SA3-SA0

    Note that SA19 to SA11 are unusable in an PC-XT.

    SA11

    SA10

    SA09

    SA08

    SA07

    SA06

    SA05

    SA04

    SA03

    SA02

    SA01

    SA00

     

    AEN

    0

    1

    1

    0

    0

    0

    1

    1

    0

    0

    8255-a1

    8255-a0

     

    1

     

    Therefore the address decoder chip (74LS138) has to use the pins as showed above, and with this data control the 8255 chip. The 74LS138 has 3 selector pins (A,B,C) which control which of the 8 outputs is to be pulled low. It also has 3 enable pins called G1, G2A, and G2B. For one of the outputs to be pulled low G1=1, G2A=0 and G2B=0. Therefore the pins are connected as shown

     

     

     

    74ls138 pinouts

    A

    A6

    1

    B

    A9

    1

    C

    A10

    0

    G1

    AEN

    1

    G2A

    A7

    0

    G2B

    A8

    0

    With this setup we are wasting address space because address pins SA5 to SA2 are not being used. While good for many prototype cards, if you are restricted with address space, or you want to put more cards in the same PC, this will be an issue. The solution to this is either to place another 74LS138 to decode the rest of the pins or use another comparator (eg74688) in a similar configuration.

     

     

    Programming

    Programming is easy, now that you have calculated you base address, all you need to know is the address of the three 8255 registers and the 8255 control register.

    8255 register A

    BASE ADDRESS+0

    8255 register B

    BASE ADDRESS+1

    8255 register C

    BASE ADDRESS+2

    8255 Control Register

    BASE ADDRESS+3

    A sample program is as follows : 

    base_address=0x300; 
    outp(base_address+3,0x80); // put all registers as output 
    outp(base_address,0x255); // pull all register A up 
    outp(base_address+1,0x255); // pull all register B up

    Now all you need is a 8255 data sheet that you may get from the Intel site :- datasheet.

     

     

    Interfacing
    The 8255 method of interfacing should be found on the datasheet itself. The 8255 are supposed to be TTL and CMOS compatible. For unpredictable loads you should place some kind of isolator between the chip and the load, to protect the card (and the PC) from surges, short-circuits, etc.. To use with heavy loads you should buffer your output using some transistors or a suitable chip would be an ULN2803A. Note that the length of the ribbon cable between the connector and the outside must be of a limited length. I have encountered some problems with lengths greater than 0.5metres.

     

     

    Expansion

    The card could be easily upgraded from 24bit to 48bit,96bit. However the space available on the board will limit the number of 8255 you can place on the board. By improving the address decoding, you can use the multiple outputs available from the address decoder to select different 8255s. As you can see in the schematic of ISA-24-IO address lines SA2 to SA5 are not used anywhere in the address decoding. By using these four lines in a multiplexer. (3 to 8 or 4 to 16 multiplexer can easily be found). Each of the multiplexor output would be fed into the CS (pin 6) of each 8255. Note that the output from the address decoder 74ls138 would be connected to the multiplexor and not to the 8255. The data D0 to D7, control lines IOR,IOW, RESET and addresses SA0 to SA1 would be the same for all 8255s. Now the address decodes addresses for example 

    0x300 - 0x302 : first 8255 
    0x303 - 0x304 : second 8255

    and so on

     

     

    If you request more information mail me fishziblu@yahoo.com

    Top of the page

    Back

    1