Figure 1
Basic form of phase lock loop
It is helpful to consider the PLL in terms of phase rather than frequency. This is done by replacing f_{o}, f_{m} and f_{r} by , , and respectively. Table 1 shows the transfer functions of the various loop elements with this change made, and Figure 2 shows the circuit.
Element | Transfer Function | Remarks |
VCO | K_{0}/S | K_{0} is tho slope of the oscillator frequency to voltage characteristic in rads per sec. per volt. |
MIXER | 1 | Change of output phase equals change of input phase. |
DIVIDER | 1/N | N is division ratio. |
PHASE DETECTOR | K_{d} | K_{d} is slope of phase detector voltage to phase characteristic In volts/radians. |
FILTER | F(s) | Transfer function depends on the type of filter used. |
Figure 2
Equivalent circuit of PLL
The transfer function, H(s), of a single feedback loop shown in Figure 2 is given by:
Where V is the voltage input at the modulation port.
Taking these in turn, and making use of equation 2, we have the following equations:
and s is a complex variable used in Laplace transform and is equal to j .
The loop filter F(s) may take one of the following forms:
These three forms, together with their transfer functions and Bode Diagrams, are summarized in Table 2.
Table 2.
Transfer functions and bode diagram of various filter networks
From Figure 2, it can be seen that the open loop gain is given by:
Three very important points should be observed from the graphs:
(i) Figure 4 shows the response when the lag/lead network is used. In the regions bc and dg, the gain is falling at 20 dB/decade. In the region cd, the gain is falling at 40 dB/decade.
Figure 3
Gain VS. frequency graphs of K/ and K/^{2}T_{1}
Figure 4
Effects of open loop gain of the lag/lead network
Figure 5
(ii) Figure 5 shows the response when the integrator plus lead network is used. In the region acd, the gain is falling at 40dB/decade.
Figure 6
(iii) Figure 6 shows the response when the integrator plus lead/lag network is used. In the region gh, the gain is falling at 40dB/decade. In the region dg, the gain is falling at 20dB/decade. From the foregoing, it is clear that:
The choice of the phase detector is determined primarily by the application. For receiver applications where low noise signal levels are encountered, double balanced mixers are used as phase detectors. For synthesizer applications, a digital type phase detector is preferred. This type of phase detector produces a current output. The transfer function, K_{d}, has units of amps/rad. The line bcdgh in Figure 7 represents the response for this phase detector/filter combination.
Figure 7
Effects of open loop gain of the integrator and lead/lag network with a current type phase detector
If the phase detector is not ideal but has a leakage resistance R_{L} , then it can be shown that
T_{1} = R
_{L}C_{1} and the open loop unity gain frequency (point e on Figure 7) is given by K^{1} = KR_{L} . For an
ideal phase detector there will be no leakage, and hence and .
From the foregoing it should be clear that both and can be redefined in terms of C_{1}:
One effect of adding a filter is to reduce the open loop unity gain frequency from K(or K^{1}) to . Frequencies below will be called in-band and frequencies higher than will be called out-of-band. The phase locked loop uses its in-band gain to enable the VCO to follow that of the reference frequency, and uses its out-of-band attenuation .to reject unwanted phase components that may be present on the reference signal. Consequently, in most applications, the response bcdgh, given by the integrator plus lead/lag network, is preferred.
A brief analysis of the phase noise performance of the PLL is given here. The noise model is presented in Figure 8 along with the equations 14 through 17.
Equation 17 describes the noise output of the PLL given the noise contribution of the reference
source, the phase detector, the loop filter, the VCO, and the feedback divider. The closed loop
transfer function of the loop can be shown to be given by:
The reference noise and the divider output noise contribution calculations follow.
The closed loop transfer function from point 1 to 4 in Figure 8 relating oscillator phase to
reference to be given by:
The phase noise contributions of reference and divider noise are therefore given by:
............ (14)
The loop division ratio must therefore be minimized so as to minimize the divider noise contributions.
Figure 8
Phase locked loop noise model
The phase detector also contributes to the output noise. In general, any noise input following the
phase detector contributes to the output noise. With reference to Figure 8, the transfer function
from point 2 to 4 is:
The overall phase noise of the the synthesizer may be written as
In conclusion, within the loop bandwidth the reference noise will be multiplied by the loop division ratio. Outside the loop bandwidth the reference noise will be attenuated by the loop transfer function. Within the loop bandwidth, the VCO noise will be attenuated. Outside the loop bandwidth, the noise will be the same as that of the free running VCO.
Figure 9
Synthesizer/PLL noise analysis