The high overhead of most dc/dc converters' normal supply currents do not permit high efficiency at low load currents. The micropower components and circuit design of the converter in Fig 1, however, enable it to maintain 90% efficiency for load currents below 8 mA.

For example, the quad Schmitt-trigger NAND gate, IC₁, draws a maximum quiescent current of 0.25 µA, and the combination voltage reference and comparator, IC₂, draws about 2.5 µA.

The circuit's boost regulator, comprising Q₁ and associated components, uses pulse-width modulation (PWM), and the circuit supplies gate drive to switch Q₁ only when needed. Further Q₁ is a low-R_DS-ON device, minimizing I²R losses in inductor L₁.

The comparator IC₂ turns the PWM boost regulator on and off. When the boost regulator is off, the entire circuit draws about 6 µA. IC₂ compares its own reference voltage against the circuit's output, V_OUT. The resulting comparator output (pin 8) is high when V_OUT is above its threshold and low otherwise.

The NAND gates form a combination oscillator, flip-flop, and buffer inverter. The flip-flop blocks oscillator pulses to the gate of Q₁ when the comparator's output is high. When the comparator's output goes low, the pulses pass through to the gate of Q₁, activating the boost regulator.

R₁ and R₂ help determine the circuit's dc output level:

The output voltage ripple for light loads depends on the comparator's hysteresis. With R₃=2.4 MOhms, the hysteresis in millivolts equals the value of R₄ in kilohms. Then, the ripple in millivolts equals

where R₄ is in kilohms. For the circuit in Fig 1,

EDN BBS /DI_SIG #1349