Digital AC Notch Filter

 

By Leonard Yee

 

January 22, 2000

 

Draft #2


Specifications for the DAN Filter

 

 

Audio input:  +/- 1V

 

Audio output: +/- 1V

This will drive a small speaker, tape recorder, or feed the input of a computer sound card.

 

Power Requirements:  120VAC 60Hz  <5W

 

 

 

 

Instructions for Use

 

Plug in the wall transformer to an outlet.  This must be an AC line, not a power generator.  The filter requires the AC line to be synchronized to the source of hum in the audio signal.

 

Plug in a mono cable into the input jack.  Plug the speaker or computer cable into the output jack.

 

The LED status light should be green during normal operation.  If the LED is flickering and the output speaker sounds like it is clipping then the input signal is exceeding the maximum limits of the device.  You must reduce the input signal to within +/- 1V.

 

The following diagram shows the hookups.

 

 


Theory of Operation

 

The Digital AC Notch (DAN) Filter is used for removing AC noise “hum” from an audio signal.  The following block diagram shows the components that make the DAN filter. 


 

 

 


The audio signal is fed into the DAN filter through a monophonic jack, which feeds an input analog buffer that is capable of +/- 1V.  This buffer is AC coupled to the input and places a DC offset to the signal.  This centers the signal for the input of the 8 bit analog to digital converter (ADC).  The buffer also forms an input anti-aliasing filter to limit the bandwidth of the signal feeding the ADC.  The filter is a Sallen-Key 2 pole low pass filter with a cutoff of 12KHz.

 

The ADC is used for digitizing the audio signal and is controlled by the microprocessor.  The microprocessor performs a digital filter algorithm and then sends the filtered value to the 8 bit digital to analog converter (DAC).  The DAC is used to restore the signal to an analog voltage.  This analog signal, if viewed, will show a stair-stepped waveform due to the quantization of the DAC.  By filtering this signal (reconstruction filter) it will approximate a true audio signal.  This signal is fed to the output audio amplifier which feeds the output stereo jack on the left channel.  The right channel is a replica of the signal feeding the ADC and therefore is a bandwidth limited version of the input signal.  The output is 0 to 2V.

 

The microprocessor requires synchronization to the 60Hz line.  The sampling rate is 512 times the line frequency or 30,720 Hz.  The 30,720 Hz sampling clock is derived from the line frequency through a phase locked loop (PLL).  The PLL begins by generating a frequency close to 30,720Hz.  This output clock is divided down by a 512 counter which leaves a signal approximately 60Hz.  This is compared to the 60Hz and the difference (error) causes the PLL to adjust its output clock appropriately.  Eventually the output of the PLL locks to 30,720 Hz which causes the counter to divide this clock by 512 generating exactly 60Hz which matches the input line frequency of 60Hz.

 

The digital filter algorithm is the key to the operation of this device.  This is implemented in the microprocessor.  Using the 30,720 Hz sampling clock the microprocessor samples the audio signal 512 times during a 60Hz cycle.  The following example shows one cycle of 60Hz and an arbitrary audio signal of 1KHz.  Assume the audio input signal is a sum of 60Hz (hum) + 1KHz (tone) and is shown in the following figure by the upper “squiggles”.  During one 60Hz cycle there would be 512 individual samples similar to the upper trace.

 

 

 

 

 

Ignoring the 1KHz for the moment, during each 60Hz cycle you would see a repeat values of the 60Hz sine wave as shown in the following figure.  Each bar of the bar chart represents a sample of a 60Hz sine wave.  If you put to 60Hz cycles above each other you will have a repeat of the previous cycle as shown below.

 

 

 

 

Next note that each corresponding sample from the top bar chart and lower bar chart would have the same value.  If you take the same sample from each following cycle you would have the same value and over time this value would remain the same.  If you were to take this constant “DC” value and feed it into a high pass filter, the filter would remove the value.  Any signals that vary with respect to the 60Hz would remain. 

 

Now lets add the 1KHz signal back into the 60Hz hum and perform this algorithm.   Since the 1KHz isn’t synchronized to the 60Hz, it will be a varying signal from cycle to cycle and will pass through a high pass filter.  The 60Hz will again appear as a DC component from cycle to cycle and therefore will be removed.  This is how the following algorithm works.  It removes the DC component of the input signal for one sample and repeats the algorithm for the following samples.  This is repeated for all 512 samples.

 

The filter algorithm is On+1 = (Vn – On) /128 + On, where Vn is the input signal, On is the past answer, On+1 is the current answer.  The 128 time constant is approximately 2 seconds.  “On” is the low pass filtered value of the input signal.  If you take the input signal and subtract the low pass filtered value you get a high pass filter value.  This difference is sent to the output DAC for conversion.

 

  

Step

Assembly Instructions for the DAN Filter

1

Solder phone jack J2.  Note all parts are on the top component side of the board.

2

Install and solder D2 and D3.  Align the band on the diode with the band in the board layout.

3

Solder phone jack J1 and clip off excessive leads.

4

Scrape the top edge of U1 and tin the area (apply some solder).  Install U1 to the board and make sure the metal portion makes full contact with the metal area of the board.  Solder the leads in place.  Solder the top edge to the board and make sure the metal is contacting the metal.

5

Install and solder all electrolytic capacitors C1, C2, C15, C16, C17, C19 (becareful of polarity, generally the capacitor has a minus sign which you should match on the board layout).  Clip off excessive leads.

6

Install and solder LED D4 with the clear portion extending away from the board.

7

Install and solder all dipped capacitors  C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C18.

8

Install and solder crystal X1.  Make sure it is slightly elevated from the board so the case doesn't contact the board traces.

9

Install and solder all resistors.

10

Install and solder all IC sockets.  Align the notch on the edge of the socket as shown in the board layout.

11

Solder leads of the transformer to the board.

12

Mount the board to the bottom plastic base of the case using the provided short screws.

13

Perform test steps to verify proper operation and install socketed parts as directed.

14

Install D1 bridge rectifier.

15

Plug-in transformer.

16

Verify voltage between case (shell of jack) and U2 - pin 4 is 5VDC. See the board layout and note on U2 there is a dot on the chip.  This corresponds to pin 1 of the actual chip.  Look for the dot on the actual chip which may be painted or a depression in the plastic.  On the same side of the chip, count starting from this pin for the fourth pin.  This is the measurement point, pin 4.  If this isn't +5VDC then there is a problem, such as a bad solder joint or U1 voltage regulator is bad.  Stop and troubleshoot before continuing.

17

Unplug transformer.

18

Insert U2 - U8 (all of the socketed parts).

19

Plug-in transformer.

20

Verify the LED eventually turns to a steady green.

21

Note: The LED blinks green once if all self tests are successful.  The LED will blink red once if U4 counter has failed.  The LED will blink twice if U3 A/D converter has failed.  The LED will blink three times if U6 memory has failed.

22

Unplug transformer.

23

Attach the top of the case by sliding over the LED and jacks.  Be careful and place the wire of the transformer in the notch of the cover. 

24

Screw the case shut using the provided screws.

25

Attach the label to the top case and align to the LED and jacks.

26

Finished!

 





Item

Part Number

Description

Identifier

Quantity

 

1

P5154

330uF ELECTROLYTIC CAPACITOR

C1

1

 

2

P5141

470uF ELECTROLYTIC CAPACITOR

C2

1

 

3

P4555

2200pF CAPACITOR

C10,C12

2

 

4

P4582

0.01uF CAPACITOR

C9,C11

2

 

5

P5174

1uF ELECTROLYTIC CAPACITOR

C17

1

 

6

P4551

0.001uF CAPACITOR

C14

1

 

7

P5134

10uF ELECTROLYTIC CAPACITOR

C15

1

 

8

P4843

33pF CAPACITOR

C6,C7

2

 

9

P4593

0.1uF CAPACITOR

C3,C4,C5,C8,C13,C18

6

 

10

P5135

22uF ELECTROLYTIC CAPACITOR

C16,C19

2

 

11

DF005M

BRIDGE RECTIFIER

D1

1

 

12

1N4001

DIODE

D2,D3

2

 

13

LXH100HGW

LED

D4

1

 

14

CP-3502M

MONO JACK

J1,J3

2

 

15

CP-3534

STEREO JACK

J2

1

 

16

1.0MQBK

1M RESISTOR

R1

1

 

17

1.5KQBK

1.5K RESISTOR

R10,R6

2

 

18

10KQBK

10K RESISTOR

R11,R15,R3,R7

4

 

19

20KQBK

20K RESISTOR

R12,R13,R17,R18

4

 

20

150KQBK

150K RESISTOR

R14

1

 

21

200QBK

200 Ohm RESISTOR

R2

1

 

22

62KQBK

62K RESISTOR

R4,R5

2

 

23

100KQBK

100K RESISTOR

R8,R9

2

 

24

75QBK

75 Ohm RESISTOR

R16,R19

2

 

25

LM340T-5.0

REGULATOR

U1

1

 

26

CD74HC4046AE

PHASE LOCKED LOOP

U10

1

 

27

74HCT4040

COUNTER

U4,U11

2

 

28

LMC660

OP AMP

U2

1

 

29

ADC0820

A/D CONVERTER

U3

1

 

30

PIC16C62A

MICROPROCESSOR

U5

1

 

31

IDT6116LA15 or CY7C128A

MEMORY

U6

1

 

32

AD557

D/A CONVERTER

U7

1

 

33

LM4880

POWER AMP

U8

1

 

34

74HCT14

HEX INVERTER

U9

1

 

35

X195

20MHz CRYSTAL

X1

1

 

36

A9306

6 PIN SOCKET

USE AT D1

1

 

37

A9308

8 PIN SOCKET

USE AT U8

1

 

38

A9314

14 PIN SOCKET

USE AT U2, U9

2

 

39

A9316

16 PIN SOCKET

USE AT U4, U7, U10, U11

4

 

40

A9320

20 PIN SOCKET

USE AT U3

1

 

41

A95243

24 PIN SOCKET

USE AT U6

1

 

42

A95283

28 PIN SOCKET

USE AT U5

1

 

43

 

PC BOARD

 

1

 

44

SR051-IB-ND

CASE

 

1

 

45

964785

SCREWS

 

4

 

46

T601-ND

9VAC TRANSFORMER

 

1

 

Step

Troubleshooting Instructions

Expected Result

1

All parts installed except socketed parts.

 

2

Install D1 bridge rectifier.

 

3

Plug-in transformer.

 

4

Verify voltage between case (shell of jack) and U2 - pin 4.

+5VDC

5

Verify voltage between case (shell of jack) and U3 - pin 20.

+5VDC

6

Verify voltage between case (shell of jack) and U4 - pin 16.

+5VDC

7

Verify voltage between case (shell of jack) and U5 - pin 20.

+5VDC

8

Verify voltage between case (shell of jack) and U6 - pin 24.

+5VDC

9

Verify voltage between case (shell of jack) and U7 - pin 11.

+5VDC

10

Verify voltage between case (shell of jack) and U8 - pin 8.

+5VDC

11

Verify voltage between case (shell of jack) and U9 - pin 14.

+5VDC

12

Verify voltage between case (shell of jack) and U10 - pin 16.

+5VDC

13

Verify voltage between case (shell of jack) and U11 - pin 16.

+5VDC

14

Un-plug transformer.

 

15

Insert U9 - 74HCT14 hex inverter.

 

16

Plug-in transformer.

 

17

Verify signal at U9 - pin 2.

60Hz square wave CMOS levels (0-5V typical)

18

Un-plug transformer.

 

19

Insert U10 and U11.

 

20

Plug-in transformer.

 

21

Verify signal at U10 - pin 14.

60Hz square wave CMOS levels (0-5V typical)

22

Verify signal at U10 - pin 3.

60Hz square wave CMOS levels (0-5V typical)

23

Verify signal at U10 - pin 4.

30KHz square wave CMOS levels (0-5V typical)

24

Un-plug transformer.

 

25

Insert U2 - U8.

 

26

Plug-in transformer.

 

27

Verify voltage between case (shell of jack) and U5 - pin 1.

+5VDC

28

Verify signal at U5 - pin 10.

20MHz square wave

29

Verify signal at U3 - pin 8.

30KHz pulses CMOS levels (0-5V typical)

30

Verify signal at U7 - pin 10.

30KHz pulses CMOS levels (0-5V typical)

31

Verify signal at U7 - pin 9.

30KHz pulses CMOS levels (0-5V typical)

32

Verify signal at U4 - pin 10.

30KHz pulses CMOS levels (0-5V typical)

33

Verify signal at U6 - pin 18.

60KHz pulses CMOS levels (0-5V typical)

34

Verify signal at U6 - pin 20.

30KHz pulses CMOS levels (0-5V typical)

35

Verify signal at U6 - pin 21.

60KHz pulses CMOS levels (0-5V typical)

36

Feed a 1KHz, 1V peak to peak sine wave into the input jack.

 

37

Verify signal at U2 - pin 1.

1KHz sine wave, 1V peak to peak centered at +2.5VDC

38

Verify signal at U2 - pin 7.

1KHz sine wave, 1V peak to peak centered at +2.5VDC

39

Verify signal at U3 - pin 1.

1KHz sine wave, 1V peak to peak centered at +2.5VDC

40

Verify signal at U2 - pin 10.

1KHz digitized sine wave, 0.5V peak to peak centered at +1.25VDC

41

Verify signal at U2 - pin 14.

1KHz sine wave, 1V peak to peak centered at +2.5VDC (approximately 90 deg lag behind the input sine wave)

42

Verify signal at U8 - pin 1.

1KHz sine wave, 1V peak to peak centered at +2.5VDC (approximately 270 deg lag behind the input sine wave)

43

Verify signal at U8 - pin 7.

1KHz sine wave, 1V peak to peak centered at +2.5VDC (approximately 180 deg lag behind the input sine wave)

44

Verify signal at the output jack on the left side.

1KHz sine wave, 1V peak to peak centered at 0 VDC (approximately 270 deg lag behind the input sine wave)

45

Verify signal at the output jack on the right side.

1KHz sine wave, 1V peak to peak centered at 0 VDC (approximately 180 deg lag behind the input sine wave)

46

Feed a 60Hz, 2V peak to peak sine wave mixed with a 1KHz 0.2V peak to peak into the input jack.

47

Verify signal at U2 - pin 1.

60Hz, 2V peak to peak sine wave mixed with a 1KHz 0.2V peak to peak centered at +2.5VDC

48

Verify signal at U2 - pin 7.

60Hz, 2V peak to peak sine wave mixed with a 1KHz 0.2V peak to peak centered at +2.5VDC

49

Verify signal at U3 - pin 1.

60Hz, 2V peak to peak sine wave mixed with a 1KHz 0.2V peak to peak centered at +2.5VDC

50

Verify signal at U2 - pin 10.

1KHz digitized sine wave, 0.1V peak to peak centered at +1.25VDC

51

Verify signal at U2 - pin 14.

1KHz sine wave, 0.2V peak to peak centered at +2.5VDC (approximately 90 deg lag behind the input sine wave)

52

Verify signal at U8 - pin 1.

1KHz sine wave, 0.2V peak to peak centered at +2.5VDC (approximately 270 deg lag behind the input sine wave)

53

Verify signal at U8 - pin 7.

60Hz, 2V peak to peak sine wave mixed with a 1KHz 0.2V peak to peak centered at +2.5VDC (approximately 180 deg lag behind the input sine wave)

54

Verify signal at the output jack on the left side.

1KHz sine wave, 0.2V peak to peak centered at 0 VDC (approximately 270 deg lag behind the input sine wave)

55

Verify signal at the output jack on the right side.

60Hz, 2V peak to peak sine wave mixed with a 1KHz 0.2V peak to peak centered at 0 VDC (approximately 180 deg lag behind the input sine wave)

56

Feed a 500Hz, 1V peak to peak sine wave into the input jack.  Verify the output jack produces the same signal, except for phase.

500Hz, 1V peak to peak sine wave of the same frequency and amplitude.

57

Vary the 500Hz, 1V peak to peak sine wave up to 5KHz and verify the amplitude is approximately (20%) the same as the input.

1V peak to peak sine wave of the same frequency and amplitude.

58

Vary the frequency from 5KHz up to 9KHz, 1V peak to peak sine wave up to 5KHz and verify the amplitude drops to approximately 50% of the input at 9KHz.

Approximately 0.5V (20%) peak to peak sine wave at 9KHz.

59

End of tests.